vhdl-model-map

vhdl-model-map is a variable defined in `vhdl-mode.el'.
Its value is shown below.

• This variable may be risky if used as a file-local variable.

Documentation:
Keymap for VHDL models.

Value:

(keymap
 (11 . vhdl-compose-components-package)
 (6 . vhdl-compose-configuration)
 (23 . vhdl-compose-wire-components)
 (16 . vhdl-compose-place-component)
 (14 . vhdl-compose-new-component)
 (19 . vhdl-stutter-mode)
 (5 . vhdl-electric-mode)
 (101 . vhdl-model-example-model))