vhdl-mode-menu-list
vhdl-mode-menu-list is a variable defined in `
vhdl-mode.el
'.
Its value is shown
below.
Documentation:
VHDL Mode menu.
Value:
("VHDL"
("Project"
["None"
(vhdl-set-project "")
:style radio :selected
(null vhdl-project)]
"--"
["Example 1"
(vhdl-set-project "Example 1")
:style radio :selected
(equal "Example 1" vhdl-project)]
["Example 2"
(vhdl-set-project "Example 2")
:style radio :selected
(equal "Example 2" vhdl-project)]
["Example 3"
(vhdl-set-project "Example 3")
:style radio :selected
(equal "Example 3" vhdl-project)]
"--" "--"
["Select Project..." vhdl-set-project t]
["Set As Default Project" vhdl-set-default-project t]
"--"
["Duplicate Project" vhdl-duplicate-project vhdl-project]
["Import Project..." vhdl-import-project :keys "C-c C-p C-m" :active t]
["Export Project" vhdl-export-project vhdl-project]
"--"
["Customize Project..."
(customize-option 'vhdl-project-alist)
t])
"--"
("Compile"
["Compile Buffer" vhdl-compile t]
["Stop Compilation" kill-compilation t]
"--"
["Make" vhdl-make t]
["Generate Makefile" vhdl-generate-makefile t]
"--"
["Next Error" next-error t]
["Previous Error" previous-error t]
["First Error" first-error t]
"--"
("Compiler"
("Compiler 1"
["ADVance MS"
(setq vhdl-compiler "ADVance MS")
:style radio :selected
(equal "ADVance MS" vhdl-compiler)]
["Aldec"
(setq vhdl-compiler "Aldec")
:style radio :selected
(equal "Aldec" vhdl-compiler)]
["Cadence Leapfrog"
(setq vhdl-compiler "Cadence Leapfrog")
:style radio :selected
(equal "Cadence Leapfrog" vhdl-compiler)]
["Cadence NC"
(setq vhdl-compiler "Cadence NC")
:style radio :selected
(equal "Cadence NC" vhdl-compiler)]
["GHDL"
(setq vhdl-compiler "GHDL")
:style radio :selected
(equal "GHDL" vhdl-compiler)]
["IBM Compiler"
(setq vhdl-compiler "IBM Compiler")
:style radio :selected
(equal "IBM Compiler" vhdl-compiler)]
["Ikos"
(setq vhdl-compiler "Ikos")
:style radio :selected
(equal "Ikos" vhdl-compiler)]
["ModelSim"
(setq vhdl-compiler "ModelSim")
:style radio :selected
(equal "ModelSim" vhdl-compiler)]
["LEDA ProVHDL"
(setq vhdl-compiler "LEDA ProVHDL")
:style radio :selected
(equal "LEDA ProVHDL" vhdl-compiler)]
["Quartus"
(setq vhdl-compiler "Quartus")
:style radio :selected
(equal "Quartus" vhdl-compiler)]
["QuickHDL"
(setq vhdl-compiler "QuickHDL")
:style radio :selected
(equal "QuickHDL" vhdl-compiler)]
["Savant"
(setq vhdl-compiler "Savant")
:style radio :selected
(equal "Savant" vhdl-compiler)]
["Simili"
(setq vhdl-compiler "Simili")
:style radio :selected
(equal "Simili" vhdl-compiler)]
["Speedwave"
(setq vhdl-compiler "Speedwave")
:style radio :selected
(equal "Speedwave" vhdl-compiler)]
["Synopsys"
(setq vhdl-compiler "Synopsys")
:style radio :selected
(equal "Synopsys" vhdl-compiler)]
["Synopsys Design Compiler"
(setq vhdl-compiler "Synopsys Design Compiler")
:style radio :selected
(equal "Synopsys Design Compiler" vhdl-compiler)]
["Synplify"
(setq vhdl-compiler "Synplify")
:style radio :selected
(equal "Synplify" vhdl-compiler)]
["Vantage"
(setq vhdl-compiler "Vantage")
:style radio :selected
(equal "Vantage" vhdl-compiler)]
["VeriBest"
(setq vhdl-compiler "VeriBest")
:style radio :selected
(equal "VeriBest" vhdl-compiler)]
["Viewlogic"
(setq vhdl-compiler "Viewlogic")
:style radio :selected
(equal "Viewlogic" vhdl-compiler)])
("Compiler 2"
["Xilinx XST"
(setq vhdl-compiler "Xilinx XST")
:style radio :selected
(equal "Xilinx XST" vhdl-compiler)])
"--" "--"
["Select Compiler..." vhdl-set-compiler t]
"--"
["Customize Compiler..."
(customize-option 'vhdl-compiler-alist)
t]))
"--"
("Template"
("VHDL Construct 1"
["Alias" vhdl-template-alias t]
["Architecture" vhdl-template-architecture t]
["Assert" vhdl-template-assert t]
["Attribute (Decl)" vhdl-template-attribute-decl t]
["Attribute (Spec)" vhdl-template-attribute-spec t]
["Block" vhdl-template-block t]
["Case" vhdl-template-case-is t]
["Component (Decl)" vhdl-template-component-decl t]
["(Component) Instance" vhdl-template-component-inst t]
["Conditional (Signal Asst)" vhdl-template-conditional-signal-asst t]
["Configuration (Block)" vhdl-template-block-configuration t]
["Configuration (Comp)" vhdl-template-component-conf t]
["Configuration (Decl)" vhdl-template-configuration-decl t]
["Configuration (Spec)" vhdl-template-configuration-spec t]
["Constant" vhdl-template-constant t]
["Disconnect" vhdl-template-disconnect t]
["Else" vhdl-template-else t]
["Elsif" vhdl-template-elsif t]
["Entity" vhdl-template-entity t]
["Exit" vhdl-template-exit t]
["File" vhdl-template-file t]
["For (Generate)" vhdl-template-for-generate t]
["For (Loop)" vhdl-template-for-loop t]
["Function (Body)" vhdl-template-function-body t]
["Function (Decl)" vhdl-template-function-decl t]
["Generic" vhdl-template-generic t]
["Group (Decl)" vhdl-template-group-decl t]
["Group (Template)" vhdl-template-group-template t])
("VHDL Construct 2"
["If (Generate)" vhdl-template-if-generate t]
["If (Then)" vhdl-template-if-then t]
["Library" vhdl-template-library t]
["Loop" vhdl-template-bare-loop t]
["Map" vhdl-template-map t]
["Next" vhdl-template-next t]
["Others (Aggregate)" vhdl-template-others t]
["Package (Decl)" vhdl-template-package-decl t]
["Package (Body)" vhdl-template-package-body t]
["Port" vhdl-template-port t]
["Procedure (Body)" vhdl-template-procedure-body t]
["Procedure (Decl)" vhdl-template-procedure-decl t]
["Process (Comb)" vhdl-template-process-comb t]
["Process (Seq)" vhdl-template-process-seq t]
["Report" vhdl-template-report t]
["Return" vhdl-template-return t]
["Select" vhdl-template-selected-signal-asst t]
["Signal" vhdl-template-signal t]
["Subtype" vhdl-template-subtype t]
["Type" vhdl-template-type t]
["Use" vhdl-template-use t]
["Variable" vhdl-template-variable t]
["Wait" vhdl-template-wait t]
["(Clocked Wait)" vhdl-template-clocked-wait t]
["When" vhdl-template-when t]
["While (Loop)" vhdl-template-while-loop t]
["With" vhdl-template-with t])
["Insert Construct..." vhdl-template-insert-construct :keys "C-c C-i C-t"]
"--"
("Package"
["numeric_bit" vhdl-template-package-numeric-bit t]
["numeric_std" vhdl-template-package-numeric-std t]
["std_logic_1164" vhdl-template-package-std-logic-1164 t]
["textio" vhdl-template-package-textio t]
"--"
["std_logic_arith" vhdl-template-package-std-logic-arith t]
["std_logic_signed" vhdl-template-package-std-logic-signed t]
["std_logic_unsigned" vhdl-template-package-std-logic-unsigned t]
["std_logic_misc" vhdl-template-package-std-logic-misc t]
["std_logic_textio" vhdl-template-package-std-logic-textio t]
"--"
["Insert Package..." vhdl-template-insert-package :keys "C-c C-i C-p"])
("Directive"
["translate_on" vhdl-template-directive-translate-on t]
["translate_off" vhdl-template-directive-translate-off t]
["synthesis_on" vhdl-template-directive-synthesis-on t]
["synthesis_off" vhdl-template-directive-synthesis-off t]
"--"
["Insert Directive..." vhdl-template-insert-directive :keys "C-c C-i C-d"])
"--"
["Insert Header" vhdl-template-header :keys "C-c C-t C-h"]
["Insert Footer" vhdl-template-footer t]
["Insert Date" vhdl-template-insert-date t]
["Modify Date" vhdl-template-modify :keys "C-c C-t C-m"]
"--"
["Query Next Prompt" vhdl-template-search-prompt t])
("Model"
["Example Model" vhdl-model-example-model :keys "C-c C-m e"]
"--" "--"
["Insert Model..." vhdl-model-insert :keys "C-c C-i C-m"]
["Customize Model..."
(customize-option 'vhdl-model-alist)
t])
("Port"
["Copy" vhdl-port-copy t]
"--"
["Paste As Entity" vhdl-port-paste-entity vhdl-port-list]
["Paste As Component" vhdl-port-paste-component vhdl-port-list]
["Paste As Instance" vhdl-port-paste-instance :keys "C-c C-p C-i" :active vhdl-port-list]
["Paste As Signals" vhdl-port-paste-signals vhdl-port-list]
["Paste As Constants" vhdl-port-paste-constants vhdl-port-list]
["Paste As Generic Map" vhdl-port-paste-generic-map vhdl-port-list]
["Paste As Initializations" vhdl-port-paste-initializations vhdl-port-list]
"--"
["Paste As Testbench" vhdl-port-paste-testbench vhdl-port-list]
"--"
["Flatten" vhdl-port-flatten :style toggle :selected vhdl-port-flattened :active vhdl-port-list]
["Reverse Direction" vhdl-port-reverse-direction :style toggle :selected vhdl-port-reversed-direction :active vhdl-port-list])
("Compose"
["New Component" vhdl-compose-new-component t]
["Copy Component" vhdl-port-copy t]
["Place Component" vhdl-compose-place-component vhdl-port-list]
["Wire Components" vhdl-compose-wire-components t]
"--"
["Generate Configuration" vhdl-compose-configuration t]
["Generate Components Package" vhdl-compose-components-package t])
("Subprogram"
["Copy" vhdl-subprog-copy t]
"--"
["Paste As Declaration" vhdl-subprog-paste-declaration vhdl-subprog-list]
["Paste As Body" vhdl-subprog-paste-body vhdl-subprog-list]
["Paste As Call" vhdl-subprog-paste-call vhdl-subprog-list]
"--"
["Flatten" vhdl-subprog-flatten :style toggle :selected vhdl-subprog-flattened :active vhdl-subprog-list])
"--"
("Comment"
["(Un)Comment Out Region" vhdl-comment-uncomment-region
(mark)]
"--"
["Insert Inline Comment" vhdl-comment-append-inline t]
["Insert Horizontal Line" vhdl-comment-display-line t]
["Insert Display Comment" vhdl-comment-display t]
"--"
["Fill Comment" fill-paragraph t]
["Fill Comment Region" fill-region
(mark)]
["Kill Comment Region" vhdl-comment-kill-region
(mark)]
["Kill Inline Comment Region" vhdl-comment-kill-inline-region
(mark)])
("Line"
["Kill" vhdl-line-kill t]
["Copy" vhdl-line-copy t]
["Yank" vhdl-line-yank t]
["Expand" vhdl-line-expand t]
"--"
["Transpose Next" vhdl-line-transpose-next t]
["Transpose Prev" vhdl-line-transpose-previous t]
["Open" vhdl-line-open t]
["Join" vhdl-delete-indentation t]
"--"
["Goto" goto-line t]
["(Un)Comment Out" vhdl-comment-uncomment-line t])
("Move"
["Forward Statement" vhdl-end-of-statement t]
["Backward Statement" vhdl-beginning-of-statement t]
["Forward Expression" vhdl-forward-sexp t]
["Backward Expression" vhdl-backward-sexp t]
["Forward Same Indent" vhdl-forward-same-indent t]
["Backward Same Indent" vhdl-backward-same-indent t]
["Forward Function" vhdl-end-of-defun t]
["Backward Function" vhdl-beginning-of-defun t]
["Mark Function" vhdl-mark-defun t])
"--"
("Indent"
["Line" indent-according-to-mode :keys "C-c C-i C-l"]
["Group" vhdl-indent-group :keys "C-c C-i C-g"]
["Region" vhdl-indent-region
(mark)]
["Buffer" vhdl-indent-buffer :keys "C-c C-i C-b"])
("Align"
["Group" vhdl-align-group t]
["Same Indent" vhdl-align-same-indent :keys "C-c C-a C-i"]
["List" vhdl-align-list t]
["Declarations" vhdl-align-declarations t]
["Region" vhdl-align-region
(mark)]
["Buffer" vhdl-align-buffer t]
"--"
["Inline Comment Group" vhdl-align-inline-comment-group t]
["Inline Comment Region" vhdl-align-inline-comment-region
(mark)]
["Inline Comment Buffer" vhdl-align-inline-comment-buffer t])
("Fill"
["List" vhdl-fill-list t]
["Group" vhdl-fill-group t]
["Same Indent" vhdl-fill-same-indent :keys "C-c C-f C-i"]
["Region" vhdl-fill-region
(mark)])
("Beautify"
["Region" vhdl-beautify-region
(mark)]
["Buffer" vhdl-beautify-buffer t])
("Fix"
["Generic/Port Clause" vhdl-fix-clause t]
["Generic/Port Clause Buffer" vhdl-fix-clause t]
"--"
["Case Region" vhdl-fix-case-region
(mark)]
["Case Buffer" vhdl-fix-case-buffer t]
"--"
["Whitespace Region" vhdl-fixup-whitespace-region
(mark)]
["Whitespace Buffer" vhdl-fixup-whitespace-buffer t]
"--"
["Statement Region" vhdl-fix-statement-region
(mark)]
["Statement Buffer" vhdl-fix-statement-buffer t]
"--"
["Trailing Spaces Buffer" vhdl-remove-trailing-spaces t])
("Update"
["Sensitivity List" vhdl-update-sensitivity-list-process t]
["Sensitivity List Buffer" vhdl-update-sensitivity-list-buffer t])
"--"
["Fontify Buffer" vhdl-fontify-buffer t]
["Statistics Buffer" vhdl-statistics-buffer t]
["Show Messages" vhdl-show-messages t]
["Syntactic Info" vhdl-show-syntactic-information t]
"--"
["Speedbar" vhdl-speedbar t]
["Hide/Show" vhdl-hs-minor-mode t]
"--"
("Documentation"
["VHDL Mode" vhdl-doc-mode :keys "C-c C-h"]
["Release Notes"
(vhdl-doc-variable 'vhdl-doc-release-notes)
t]
["Reserved Words"
(vhdl-doc-variable 'vhdl-doc-keywords)
t]
["Coding Style"
(vhdl-doc-variable 'vhdl-doc-coding-style)
t])
["Version" vhdl-version t]
["Bug Report..." vhdl-submit-bug-report t]
"--"
("Options"
("Mode"
["Electric Mode"
(progn
(customize-set-variable 'vhdl-electric-mode
(not vhdl-electric-mode))
(vhdl-mode-line-update))
:style toggle :selected vhdl-electric-mode :keys "C-c C-m C-e"]
["Stutter Mode"
(progn
(customize-set-variable 'vhdl-stutter-mode
(not vhdl-stutter-mode))
(vhdl-mode-line-update))
:style toggle :selected vhdl-stutter-mode :keys "C-c C-m C-s"]
["Indent Tabs Mode"
(progn
(customize-set-variable 'vhdl-indent-tabs-mode
(not vhdl-indent-tabs-mode))
(setq indent-tabs-mode vhdl-indent-tabs-mode))
:style toggle :selected vhdl-indent-tabs-mode]
"--"
["Customize Group..."
(customize-group 'vhdl-mode)
t])
("Project"
["Project Setup..."
(customize-option 'vhdl-project-alist)
t]
("Selected Project at Startup"
["None"
(progn
(customize-set-variable 'vhdl-project nil)
(vhdl-set-project ""))
:style radio :selected
(null vhdl-project)]
"--"
["Example 1"
(progn
(customize-set-variable 'vhdl-project "Example 1")
(vhdl-set-project "Example 1"))
:style radio :selected
(equal "Example 1" vhdl-project)]
["Example 2"
(progn
(customize-set-variable 'vhdl-project "Example 2")
(vhdl-set-project "Example 2"))
:style radio :selected
(equal "Example 2" vhdl-project)]
["Example 3"
(progn
(customize-set-variable 'vhdl-project "Example 3")
(vhdl-set-project "Example 3"))
:style radio :selected
(equal "Example 3" vhdl-project)])
["Setup File Name..."
(customize-option 'vhdl-project-file-name)
t]
("Auto Load Setup File"
["At Startup"
(customize-set-variable 'vhdl-project-auto-load
(if
(memq 'startup vhdl-project-auto-load)
(delq 'startup vhdl-project-auto-load)
(cons 'startup vhdl-project-auto-load)))
:style toggle :selected
(memq 'startup vhdl-project-auto-load)])
["Sort Projects"
(customize-set-variable 'vhdl-project-sort
(not vhdl-project-sort))
:style toggle :selected vhdl-project-sort]
"--"
["Customize Group..."
(customize-group 'vhdl-project)
t])
("Compiler"
["Compiler Setup..."
(customize-option 'vhdl-compiler-alist)
t]
("Selected Compiler at Startup"
("Compiler 1"
["ADVance MS"
(customize-set-variable 'vhdl-compiler "ADVance MS")
:style radio :selected
(equal "ADVance MS" vhdl-compiler)]
["Aldec"
(customize-set-variable 'vhdl-compiler "Aldec")
:style radio :selected
(equal "Aldec" vhdl-compiler)]
["Cadence Leapfrog"
(customize-set-variable 'vhdl-compiler "Cadence Leapfrog")
:style radio :selected
(equal "Cadence Leapfrog" vhdl-compiler)]
["Cadence NC"
(customize-set-variable 'vhdl-compiler "Cadence NC")
:style radio :selected
(equal "Cadence NC" vhdl-compiler)]
["GHDL"
(customize-set-variable 'vhdl-compiler "GHDL")
:style radio :selected
(equal "GHDL" vhdl-compiler)]
["IBM Compiler"
(customize-set-variable 'vhdl-compiler "IBM Compiler")
:style radio :selected
(equal "IBM Compiler" vhdl-compiler)]
["Ikos"
(customize-set-variable 'vhdl-compiler "Ikos")
:style radio :selected
(equal "Ikos" vhdl-compiler)]
["ModelSim"
(customize-set-variable 'vhdl-compiler "ModelSim")
:style radio :selected
(equal "ModelSim" vhdl-compiler)]
["LEDA ProVHDL"
(customize-set-variable 'vhdl-compiler "LEDA ProVHDL")
:style radio :selected
(equal "LEDA ProVHDL" vhdl-compiler)]
["Quartus"
(customize-set-variable 'vhdl-compiler "Quartus")
:style radio :selected
(equal "Quartus" vhdl-compiler)]
["QuickHDL"
(customize-set-variable 'vhdl-compiler "QuickHDL")
:style radio :selected
(equal "QuickHDL" vhdl-compiler)]
["Savant"
(customize-set-variable 'vhdl-compiler "Savant")
:style radio :selected
(equal "Savant" vhdl-compiler)]
["Simili"
(customize-set-variable 'vhdl-compiler "Simili")
:style radio :selected
(equal "Simili" vhdl-compiler)]
["Speedwave"
(customize-set-variable 'vhdl-compiler "Speedwave")
:style radio :selected
(equal "Speedwave" vhdl-compiler)]
["Synopsys"
(customize-set-variable 'vhdl-compiler "Synopsys")
:style radio :selected
(equal "Synopsys" vhdl-compiler)]
["Synopsys Design Compiler"
(customize-set-variable 'vhdl-compiler "Synopsys Design Compiler")
:style radio :selected
(equal "Synopsys Design Compiler" vhdl-compiler)]
["Synplify"
(customize-set-variable 'vhdl-compiler "Synplify")
:style radio :selected
(equal "Synplify" vhdl-compiler)]
["Vantage"
(customize-set-variable 'vhdl-compiler "Vantage")
:style radio :selected
(equal "Vantage" vhdl-compiler)]
["VeriBest"
(customize-set-variable 'vhdl-compiler "VeriBest")
:style radio :selected
(equal "VeriBest" vhdl-compiler)]
["Viewlogic"
(customize-set-variable 'vhdl-compiler "Viewlogic")
:style radio :selected
(equal "Viewlogic" vhdl-compiler)])
("Compiler 2"
["Xilinx XST"
(customize-set-variable 'vhdl-compiler "Xilinx XST")
:style radio :selected
(equal "Xilinx XST" vhdl-compiler)]))
["Use Local Error Regexp"
(customize-set-variable 'vhdl-compile-use-local-error-regexp
(not vhdl-compile-use-local-error-regexp))
:style toggle :selected vhdl-compile-use-local-error-regexp]
["Makefile Default Targets..."
(customize-option 'vhdl-makefile-default-targets)
t]
["Makefile Generation Hook..."
(customize-option 'vhdl-makefile-generation-hook)
t]
["Default Library Name"
(customize-option 'vhdl-default-library)
t]
"--"
["Customize Group..."
(customize-group 'vhdl-compiler)
t])
("Style"
("VHDL Standard"
["VHDL'87"
(progn
(customize-set-variable 'vhdl-standard
(list '87
(cadr vhdl-standard)))
(vhdl-activate-customizations))
:style radio :selected
(eq '87
(car vhdl-standard))]
["VHDL'93/02"
(progn
(customize-set-variable 'vhdl-standard
(list '93
(cadr vhdl-standard)))
(vhdl-activate-customizations))
:style radio :selected
(eq '93
(car vhdl-standard))]
"--"
["VHDL-AMS"
(progn
(customize-set-variable 'vhdl-standard
(list
(car vhdl-standard)
(if
(memq 'ams
(cadr vhdl-standard))
(delq 'ams
(cadr vhdl-standard))
(cons 'ams
(cadr vhdl-standard)))))
(vhdl-activate-customizations))
:style toggle :selected
(memq 'ams
(cadr vhdl-standard))]
["Math Packages"
(progn
(customize-set-variable 'vhdl-standard
(list
(car vhdl-standard)
(if
(memq 'math
(cadr vhdl-standard))
(delq 'math
(cadr vhdl-standard))
(cons 'math
(cadr vhdl-standard)))))
(vhdl-activate-customizations))
:style toggle :selected
(memq 'math
(cadr vhdl-standard))])
["Indentation Offset..."
(customize-option 'vhdl-basic-offset)
t]
["Upper Case Keywords"
(customize-set-variable 'vhdl-upper-case-keywords
(not vhdl-upper-case-keywords))
:style toggle :selected vhdl-upper-case-keywords]
["Upper Case Types"
(customize-set-variable 'vhdl-upper-case-types
(not vhdl-upper-case-types))
:style toggle :selected vhdl-upper-case-types]
["Upper Case Attributes"
(customize-set-variable 'vhdl-upper-case-attributes
(not vhdl-upper-case-attributes))
:style toggle :selected vhdl-upper-case-attributes]
["Upper Case Enumeration Values"
(customize-set-variable 'vhdl-upper-case-enum-values
(not vhdl-upper-case-enum-values))
:style toggle :selected vhdl-upper-case-enum-values]
["Upper Case Constants"
(customize-set-variable 'vhdl-upper-case-constants
(not vhdl-upper-case-constants))
:style toggle :selected vhdl-upper-case-constants]
("Use Direct Instantiation"
["Never"
(customize-set-variable 'vhdl-use-direct-instantiation 'never)
:style radio :selected
(eq 'never vhdl-use-direct-instantiation)]
["Standard"
(customize-set-variable 'vhdl-use-direct-instantiation 'standard)
:style radio :selected
(eq 'standard vhdl-use-direct-instantiation)]
["Always"
(customize-set-variable 'vhdl-use-direct-instantiation 'always)
:style radio :selected
(eq 'always vhdl-use-direct-instantiation)])
["Include Array Index and Record Field in Sensitivity List"
(customize-set-variable 'vhdl-array-index-record-field-in-sensitivity-list
(not vhdl-array-index-record-field-in-sensitivity-list))
:style toggle :selected vhdl-array-index-record-field-in-sensitivity-list]
"--"
["Customize Group..."
(customize-group 'vhdl-style)
t])
("Naming"
["Entity File Name..."
(customize-option 'vhdl-entity-file-name)
t]
["Architecture File Name..."
(customize-option 'vhdl-architecture-file-name)
t]
["Configuration File Name..."
(customize-option 'vhdl-configuration-file-name)
t]
["Package File Name..."
(customize-option 'vhdl-package-file-name)
t]
("File Name Case"
["As Is"
(customize-set-variable 'vhdl-file-name-case 'identity)
:style radio :selected
(eq 'identity vhdl-file-name-case)]
["Lower Case"
(customize-set-variable 'vhdl-file-name-case 'downcase)
:style radio :selected
(eq 'downcase vhdl-file-name-case)]
["Upper Case"
(customize-set-variable 'vhdl-file-name-case 'upcase)
:style radio :selected
(eq 'upcase vhdl-file-name-case)]
["Capitalize"
(customize-set-variable 'vhdl-file-name-case 'capitalize)
:style radio :selected
(eq 'capitalize vhdl-file-name-case)])
"--"
["Customize Group..."
(customize-group 'vhdl-naming)
t])
("Template"
("Electric Keywords"
["VHDL Keywords"
(customize-set-variable 'vhdl-electric-keywords
(if
(memq 'vhdl vhdl-electric-keywords)
(delq 'vhdl vhdl-electric-keywords)
(cons 'vhdl vhdl-electric-keywords)))
:style toggle :selected
(memq 'vhdl vhdl-electric-keywords)]
["User Model Keywords"
(customize-set-variable 'vhdl-electric-keywords
(if
(memq 'user vhdl-electric-keywords)
(delq 'user vhdl-electric-keywords)
(cons 'user vhdl-electric-keywords)))
:style toggle :selected
(memq 'user vhdl-electric-keywords)])
("Insert Optional Labels"
["None"
(customize-set-variable 'vhdl-optional-labels 'none)
:style radio :selected
(eq 'none vhdl-optional-labels)]
["Processes Only"
(customize-set-variable 'vhdl-optional-labels 'process)
:style radio :selected
(eq 'process vhdl-optional-labels)]
["All Constructs"
(customize-set-variable 'vhdl-optional-labels 'all)
:style radio :selected
(eq 'all vhdl-optional-labels)])
("Insert Empty Lines"
["None"
(customize-set-variable 'vhdl-insert-empty-lines 'none)
:style radio :selected
(eq 'none vhdl-insert-empty-lines)]
["Design Units Only"
(customize-set-variable 'vhdl-insert-empty-lines 'unit)
:style radio :selected
(eq 'unit vhdl-insert-empty-lines)]
["All Constructs"
(customize-set-variable 'vhdl-insert-empty-lines 'all)
:style radio :selected
(eq 'all vhdl-insert-empty-lines)])
["Argument List Indent"
(customize-set-variable 'vhdl-argument-list-indent
(not vhdl-argument-list-indent))
:style toggle :selected vhdl-argument-list-indent]
["Association List with Formals"
(customize-set-variable 'vhdl-association-list-with-formals
(not vhdl-association-list-with-formals))
:style toggle :selected vhdl-association-list-with-formals]
["Conditions in Parenthesis"
(customize-set-variable 'vhdl-conditions-in-parenthesis
(not vhdl-conditions-in-parenthesis))
:style toggle :selected vhdl-conditions-in-parenthesis]
["Zero String..."
(customize-option 'vhdl-zero-string)
t]
["One String..."
(customize-option 'vhdl-one-string)
t]
("File Header"
["Header String..."
(customize-option 'vhdl-file-header)
t]
["Footer String..."
(customize-option 'vhdl-file-footer)
t]
["Company Name..."
(customize-option 'vhdl-company-name)
t]
["Copyright String..."
(customize-option 'vhdl-copyright-string)
t]
["Platform Specification..."
(customize-option 'vhdl-platform-spec)
t]
["Date Format..."
(customize-option 'vhdl-date-format)
t]
["Modify Date Prefix String..."
(customize-option 'vhdl-modify-date-prefix-string)
t]
["Modify Date on Saving"
(progn
(customize-set-variable 'vhdl-modify-date-on-saving
(not vhdl-modify-date-on-saving))
(vhdl-activate-customizations))
:style toggle :selected vhdl-modify-date-on-saving])
("Sequential Process"
("Kind of Reset"
["None"
(customize-set-variable 'vhdl-reset-kind 'none)
:style radio :selected
(eq 'none vhdl-reset-kind)]
["Synchronous"
(customize-set-variable 'vhdl-reset-kind 'sync)
:style radio :selected
(eq 'sync vhdl-reset-kind)]
["Asynchronous"
(customize-set-variable 'vhdl-reset-kind 'async)
:style radio :selected
(eq 'async vhdl-reset-kind)]
["Query"
(customize-set-variable 'vhdl-reset-kind 'query)
:style radio :selected
(eq 'query vhdl-reset-kind)])
["Reset is Active High"
(customize-set-variable 'vhdl-reset-active-high
(not vhdl-reset-active-high))
:style toggle :selected vhdl-reset-active-high]
["Use Rising Clock Edge"
(customize-set-variable 'vhdl-clock-rising-edge
(not vhdl-clock-rising-edge))
:style toggle :selected vhdl-clock-rising-edge]
("Clock Edge Condition"
["Standard"
(customize-set-variable 'vhdl-clock-edge-condition 'standard)
:style radio :selected
(eq 'standard vhdl-clock-edge-condition)]
["Function \"rising_edge\""
(customize-set-variable 'vhdl-clock-edge-condition 'function)
:style radio :selected
(eq 'function vhdl-clock-edge-condition)])
["Clock Name..."
(customize-option 'vhdl-clock-name)
t]
["Reset Name..."
(customize-option 'vhdl-reset-name)
t])
"--"
["Customize Group..."
(customize-group 'vhdl-template)
t])
("Model"
["Model Definition..."
(customize-option 'vhdl-model-alist)
t])
("Port"
["Include Port Comments"
(customize-set-variable 'vhdl-include-port-comments
(not vhdl-include-port-comments))
:style toggle :selected vhdl-include-port-comments]
["Include Direction Comments"
(customize-set-variable 'vhdl-include-direction-comments
(not vhdl-include-direction-comments))
:style toggle :selected vhdl-include-direction-comments]
["Include Type Comments"
(customize-set-variable 'vhdl-include-type-comments
(not vhdl-include-type-comments))
:style toggle :selected vhdl-include-type-comments]
("Include Group Comments"
["Never"
(customize-set-variable 'vhdl-include-group-comments 'never)
:style radio :selected
(eq 'never vhdl-include-group-comments)]
["Declarations"
(customize-set-variable 'vhdl-include-group-comments 'decl)
:style radio :selected
(eq 'decl vhdl-include-group-comments)]
["Always"
(customize-set-variable 'vhdl-include-group-comments 'always)
:style radio :selected
(eq 'always vhdl-include-group-comments)])
["Actual Generic Name..."
(customize-option 'vhdl-actual-generic-name)
t]
["Actual Port Name..."
(customize-option 'vhdl-actual-port-name)
t]
["Instance Name..."
(customize-option 'vhdl-instance-name)
t]
("Testbench"
["Entity Name..."
(customize-option 'vhdl-testbench-entity-name)
t]
["Architecture Name..."
(customize-option 'vhdl-testbench-architecture-name)
t]
["Configuration Name..."
(customize-option 'vhdl-testbench-configuration-name)
t]
["DUT Name..."
(customize-option 'vhdl-testbench-dut-name)
t]
["Include Header"
(customize-set-variable 'vhdl-testbench-include-header
(not vhdl-testbench-include-header))
:style toggle :selected vhdl-testbench-include-header]
["Declarations..."
(customize-option 'vhdl-testbench-declarations)
t]
["Statements..."
(customize-option 'vhdl-testbench-statements)
t]
["Initialize Signals"
(customize-set-variable 'vhdl-testbench-initialize-signals
(not vhdl-testbench-initialize-signals))
:style toggle :selected vhdl-testbench-initialize-signals]
["Include Library Clause"
(customize-set-variable 'vhdl-testbench-include-library
(not vhdl-testbench-include-library))
:style toggle :selected vhdl-testbench-include-library]
["Include Configuration"
(customize-set-variable 'vhdl-testbench-include-configuration
(not vhdl-testbench-include-configuration))
:style toggle :selected vhdl-testbench-include-configuration]
("Create Files"
["None"
(customize-set-variable 'vhdl-testbench-create-files 'none)
:style radio :selected
(eq 'none vhdl-testbench-create-files)]
["Single"
(customize-set-variable 'vhdl-testbench-create-files 'single)
:style radio :selected
(eq 'single vhdl-testbench-create-files)]
["Separate"
(customize-set-variable 'vhdl-testbench-create-files 'separate)
:style radio :selected
(eq 'separate vhdl-testbench-create-files)])
["Testbench Entity File Name..."
(customize-option 'vhdl-testbench-entity-file-name)
t]
["Testbench Architecture File Name..."
(customize-option 'vhdl-testbench-architecture-file-name)
t])
"--"
["Customize Group..."
(customize-group 'vhdl-port)
t])
("Compose"
["Architecture Name..."
(customize-option 'vhdl-compose-architecture-name)
t]
["Configuration Name..."
(customize-option 'vhdl-compose-configuration-name)
t]
["Components Package Name..."
(customize-option 'vhdl-components-package-name)
t]
["Use Components Package"
(customize-set-variable 'vhdl-use-components-package
(not vhdl-use-components-package))
:style toggle :selected vhdl-use-components-package]
["Include Header"
(customize-set-variable 'vhdl-compose-include-header
(not vhdl-compose-include-header))
:style toggle :selected vhdl-compose-include-header]
("Create Entity/Architecture Files"
["None"
(customize-set-variable 'vhdl-compose-create-files 'none)
:style radio :selected
(eq 'none vhdl-compose-create-files)]
["Single"
(customize-set-variable 'vhdl-compose-create-files 'single)
:style radio :selected
(eq 'single vhdl-compose-create-files)]
["Separate"
(customize-set-variable 'vhdl-compose-create-files 'separate)
:style radio :selected
(eq 'separate vhdl-compose-create-files)])
["Create Configuration File"
(customize-set-variable 'vhdl-compose-configuration-create-file
(not vhdl-compose-configuration-create-file))
:style toggle :selected vhdl-compose-configuration-create-file]
["Hierarchical Configuration"
(customize-set-variable 'vhdl-compose-configuration-hierarchical
(not vhdl-compose-configuration-hierarchical))
:style toggle :selected vhdl-compose-configuration-hierarchical]
["Use Subconfiguration"
(customize-set-variable 'vhdl-compose-configuration-use-subconfiguration
(not vhdl-compose-configuration-use-subconfiguration))
:style toggle :selected vhdl-compose-configuration-use-subconfiguration]
"--"
["Customize Group..."
(customize-group 'vhdl-compose)
t])
("Comment"
["Self Insert Comments"
(customize-set-variable 'vhdl-self-insert-comments
(not vhdl-self-insert-comments))
:style toggle :selected vhdl-self-insert-comments]
["Prompt for Comments"
(customize-set-variable 'vhdl-prompt-for-comments
(not vhdl-prompt-for-comments))
:style toggle :selected vhdl-prompt-for-comments]
["Inline Comment Column..."
(customize-option 'vhdl-inline-comment-column)
t]
["End Comment Column..."
(customize-option 'vhdl-end-comment-column)
t]
"--"
["Customize Group..."
(customize-group 'vhdl-comment)
t])
("Beautify"
["Auto Align Templates"
(customize-set-variable 'vhdl-auto-align
(not vhdl-auto-align))
:style toggle :selected vhdl-auto-align]
["Align Line Groups"
(customize-set-variable 'vhdl-align-groups
(not vhdl-align-groups))
:style toggle :selected vhdl-align-groups]
["Group Separation String..."
(customize-option 'vhdl-align-group-separate)
t]
["Align Lines with Same Indent"
(customize-set-variable 'vhdl-align-same-indent
(not vhdl-align-same-indent))
:style toggle :selected vhdl-align-same-indent]
["Beautify Options..."
(customize-option 'vhdl-beautify-options)
t]
"--"
["Customize Group..."
(customize-group 'vhdl-beautify)
t])
("Highlight"
["Highlighting On/Off..."
(customize-option
(if
(fboundp 'global-font-lock-mode)
'global-font-lock-mode 'font-lock-auto-fontify))
t]
["Highlight Keywords"
(progn
(customize-set-variable 'vhdl-highlight-keywords
(not vhdl-highlight-keywords))
(vhdl-fontify-buffer))
:style toggle :selected vhdl-highlight-keywords]
["Highlight Names"
(progn
(customize-set-variable 'vhdl-highlight-names
(not vhdl-highlight-names))
(vhdl-fontify-buffer))
:style toggle :selected vhdl-highlight-names]
["Highlight Special Words"
(progn
(customize-set-variable 'vhdl-highlight-special-words
(not vhdl-highlight-special-words))
(vhdl-fontify-buffer))
:style toggle :selected vhdl-highlight-special-words]
["Highlight Forbidden Words"
(progn
(customize-set-variable 'vhdl-highlight-forbidden-words
(not vhdl-highlight-forbidden-words))
(vhdl-fontify-buffer))
:style toggle :selected vhdl-highlight-forbidden-words]
["Highlight Verilog Keywords"
(progn
(customize-set-variable 'vhdl-highlight-verilog-keywords
(not vhdl-highlight-verilog-keywords))
(vhdl-fontify-buffer))
:style toggle :selected vhdl-highlight-verilog-keywords]
["Highlight \"translate_off\""
(progn
(customize-set-variable 'vhdl-highlight-translate-off
(not vhdl-highlight-translate-off))
(vhdl-fontify-buffer))
:style toggle :selected vhdl-highlight-translate-off]
["Case Sensitive Highlighting"
(progn
(customize-set-variable 'vhdl-highlight-case-sensitive
(not vhdl-highlight-case-sensitive))
(vhdl-fontify-buffer))
:style toggle :selected vhdl-highlight-case-sensitive]
["Special Syntax Definition..."
(customize-option 'vhdl-special-syntax-alist)
t]
["Forbidden Words..."
(customize-option 'vhdl-forbidden-words)
t]
["Forbidden Syntax..."
(customize-option 'vhdl-forbidden-syntax)
t]
["Directive Keywords..."
(customize-option 'vhdl-directive-keywords)
t]
["Colors..."
(customize-group 'vhdl-highlight-faces)
t]
"--"
["Customize Group..."
(customize-group 'vhdl-highlight)
t])
("Speedbar"
["Auto Open at Startup"
(customize-set-variable 'vhdl-speedbar-auto-open
(not vhdl-speedbar-auto-open))
:style toggle :selected vhdl-speedbar-auto-open]
("Default Displaying Mode"
["Files"
(customize-set-variable 'vhdl-speedbar-display-mode 'files)
:style radio :selected
(eq 'files vhdl-speedbar-display-mode)]
["Directory Hierarchy"
(customize-set-variable 'vhdl-speedbar-display-mode 'directory)
:style radio :selected
(eq 'directory vhdl-speedbar-display-mode)]
["Project Hierarchy"
(customize-set-variable 'vhdl-speedbar-display-mode 'project)
:style radio :selected
(eq 'project vhdl-speedbar-display-mode)])
["Indentation Offset..."
(customize-option 'speedbar-indentation-width)
t]
["Scan Size Limits..."
(customize-option 'vhdl-speedbar-scan-limit)
t]
["Jump to Unit when Opening"
(customize-set-variable 'vhdl-speedbar-jump-to-unit
(not vhdl-speedbar-jump-to-unit))
:style toggle :selected vhdl-speedbar-jump-to-unit]
["Update Hierarchy on File Saving"
(customize-set-variable 'vhdl-speedbar-update-on-saving
(not vhdl-speedbar-update-on-saving))
:style toggle :selected vhdl-speedbar-update-on-saving]
("Save in Cache File"
["Hierarchy Information"
(customize-set-variable 'vhdl-speedbar-save-cache
(if
(memq 'hierarchy vhdl-speedbar-save-cache)
(delq 'hierarchy vhdl-speedbar-save-cache)
(cons 'hierarchy vhdl-speedbar-save-cache)))
:style toggle :selected
(memq 'hierarchy vhdl-speedbar-save-cache)]
["Displaying Status"
(customize-set-variable 'vhdl-speedbar-save-cache
(if
(memq 'display vhdl-speedbar-save-cache)
(delq 'display vhdl-speedbar-save-cache)
(cons 'display vhdl-speedbar-save-cache)))
:style toggle :selected
(memq 'display vhdl-speedbar-save-cache)])
["Cache File Name..."
(customize-option 'vhdl-speedbar-cache-file-name)
t]
"--"
["Customize Group..."
(customize-group 'vhdl-speedbar)
t])
("Menu"
["Add Index Menu when Loading File"
(progn
(customize-set-variable 'vhdl-index-menu
(not vhdl-index-menu))
(vhdl-index-menu-init))
:style toggle :selected vhdl-index-menu]
["Add Source File Menu when Loading File"
(progn
(customize-set-variable 'vhdl-source-file-menu
(not vhdl-source-file-menu))
(vhdl-add-source-files-menu))
:style toggle :selected vhdl-source-file-menu]
["Add Hideshow Menu at Startup"
(progn
(customize-set-variable 'vhdl-hideshow-menu
(not vhdl-hideshow-menu))
(vhdl-activate-customizations))
:style toggle :selected vhdl-hideshow-menu]
["Hide Everything Initially"
(customize-set-variable 'vhdl-hide-all-init
(not vhdl-hide-all-init))
:style toggle :selected vhdl-hide-all-init]
"--"
["Customize Group..."
(customize-group 'vhdl-menu)
t])
("Print"
["In Two Column Format"
(progn
(customize-set-variable 'vhdl-print-two-column
(not vhdl-print-two-column))
(message "Activate new setting by saving options and restarting Emacs"))
:style toggle :selected vhdl-print-two-column]
["Use Customized Faces"
(progn
(customize-set-variable 'vhdl-print-customize-faces
(not vhdl-print-customize-faces))
(message "Activate new setting by saving options and restarting Emacs"))
:style toggle :selected vhdl-print-customize-faces]
"--"
["Customize Group..."
(customize-group 'vhdl-print)
t])
("Miscellaneous"
["Use Intelligent Tab"
(progn
(customize-set-variable 'vhdl-intelligent-tab
(not vhdl-intelligent-tab))
(vhdl-activate-customizations))
:style toggle :selected vhdl-intelligent-tab]
["Indent Syntax-Based"
(customize-set-variable 'vhdl-indent-syntax-based
(not vhdl-indent-syntax-based))
:style toggle :selected vhdl-indent-syntax-based]
["Indent Comments Like Next Code Line"
(customize-set-variable 'vhdl-indent-comment-like-next-code-line
(not vhdl-indent-comment-like-next-code-line))
:style toggle :selected vhdl-indent-comment-like-next-code-line]
["Word Completion is Case Sensitive"
(customize-set-variable 'vhdl-word-completion-case-sensitive
(not vhdl-word-completion-case-sensitive))
:style toggle :selected vhdl-word-completion-case-sensitive]
["Word Completion in Minibuffer"
(progn
(customize-set-variable 'vhdl-word-completion-in-minibuffer
(not vhdl-word-completion-in-minibuffer))
(message "Activate new setting by saving options and restarting Emacs"))
:style toggle :selected vhdl-word-completion-in-minibuffer]
["Underscore is Part of Word"
(progn
(customize-set-variable 'vhdl-underscore-is-part-of-word
(not vhdl-underscore-is-part-of-word))
(vhdl-activate-customizations))
:style toggle :selected vhdl-underscore-is-part-of-word]
"--"
["Customize Group..."
(customize-group 'vhdl-misc)
t])
["Related..."
(customize-browse 'vhdl-related)
t]
"--"
["Save Options" customize-save-customized t]
["Activate Options" vhdl-activate-customizations t]
["Browse Options..." vhdl-customize t]))