verilog-property-re

verilog-property-re is a variable defined in `verilog-mode.el'.
Its value is

"\\(\\<[a-zA-Z_][a-zA-Z_0-9.]*\\>\\s-*:\\s-*\\)?\\(\\(assert\\|assume\\|cover\\)\\>\\s-+\\\\)\\|\\(assert\\)"

• This variable may be risky if used as a file-local variable.

Documentation:
Not documented as a variable.