verilog-mode-hook is a variable defined in `verilog-mode.el'.
Its value is
verilog-set-compile-command
This variable may be risky if used as a file-local variable.
Documentation:
Hook run after entering Verilog mode.
No problems result if this variable is not bound.
`add-hook' automatically binds it. (This is true for all hook variables.)
You can customize this variable.