verilog-endcase-re

verilog-endcase-re is a variable defined in `verilog-mode.el'.
Its value is

"\\(\\(unique0?\\s-+\\|priority\\s-+\\)?case[xz]?\\)\\|\\(endcase\\)\\|\\<\\(c\\(?:lass\\|onfig\\)\\|interface\\|m\\(?:\\(?:acrom\\)?odule\\)\\|p\\(?:ackage\\|r\\(?:imitive\\|ogram\\)\\)\\)\\>"

• This variable may be risky if used as a file-local variable.

Documentation:
Not documented as a variable.