verilog-basic-complete-re

verilog-basic-complete-re is a variable defined in `verilog-mode.el'.
Its value is

"\\<\\(a\\(?:lways\\(?:_\\(?:comb\\|ff\\|latch\\)\\)?\\|ss\\(?:ert\\|ign\\)\\)\\|constraint\\|do\\|else\\|f\\(?:inal\\|or\\(?:e\\(?:ach\\|ver\\)\\)?\\)\\|i\\(?:f\\|mport\\|nitial\\)\\|localparam\\|m\\(?:\\(?:acrom\\)?odule\\)\\|parameter\\|r\\(?:andcase\\|epeat\\)\\|while\\)\\>"

  • This variable may be risky if used as a file-local variable.

Documentation:
Not documented as a variable.