verilog-auto-sense-include-inputs
verilog-auto-sense-include-inputs is a variable defined in `verilog-mode.el
'.Its value is
nil
- This variable is safe as a file local variable if its value
satisfies the predicate `verilog-booleanp'.
Documentation:
Non-nil means AUTOSENSE should include all inputs.
If nil, only inputs that are NOT output signals in the same block are
included.
You can customize this variable.