verilog-auto-end-comment-lines-re

verilog-auto-end-comment-lines-re is a variable defined in `verilog-mode.el'.
Its value is

"\\(\\<\\(`\\(?:case\\|def\\(?:ault\\|ine\\)\\|e\\(?:ls\\(?:e\\|if\\)\\|nd\\(?:for\\|if\\|protect\\|switch\\|while\\)\\)\\|for\\(?:mat\\)?\\|i\\(?:f\\(?:n?def\\)?\\|nclude\\)\\|let\\|protect\\|switch\\|time\\(?:_?scale\\)\\|undef\\|while\\)\\)\\>\\)\\|\\(\\<\\(begin\\|e\\(?:lse\\|nd\\(?:c\\(?:ase\\|l\\(?:ass\\|ocking\\)\\)\\|function\\|group\\|interface\\|module\\|p\\(?:ackage\\|r\\(?:imitive\\|o\\(?:gram\\|perty\\)\\)\\)\\|s\\(?:equence\\|pecify\\)\\|ta\\(?:ble\\|sk\\)\\)?\\)\\|interface\\|join\\(?:_\\(?:any\\|none\\)\\)?\\|\\(?:m\\(?:\\(?:acrom\\)?odul\\)\\|p\\(?:ackag\\|rimitiv\\)\\)e\\)\\>\\)"

• This variable may be risky if used as a file-local variable.

Documentation:
Not documented as a variable.