verilog-assignment-operator-re
verilog-assignment-operator-re is a variable defined in `verilog-mode.el
'.
Its value is "\\(!=\\(?:==\\|\\?\\)?\\|%=\\|&=\\|\\*=\\|\\+=\\|-\\(?:>>\\|[=>]\\)\\|/=\\|:=\\|<\\(?:\\(?:<\\)?=\\)\\|=\\(?:=[=?]?\\)?\\|>\\(?:\\(?:>>?\\)?=\\)\\|\\^=\\||\\(?:->\\|=>?\\)\\)"
- This variable may be risky if used as a file-local variable.