verilog-read-always-signals-recurse

verilog-read-always-signals-recurse is a compiled Lisp function in `verilog-mode.el'.

(verilog-read-always-signals-recurse EXIT-KEYWD RVALUE TEMP-NEXT)

Recursive routine for parentheses/bracket matching.
EXIT-KEYWD is expression to stop at, nil if top level.
RVALUE is true if at right hand side of equal.
IGNORE-NEXT is true to ignore next token, fake from inside case statement.