verilog-auto-inst-param

verilog-auto-inst-param is a compiled Lisp function in `verilog-mode.el'.

(verilog-auto-inst-param)

Expand AUTOINSTPARAM statements, as part of M-x verilog-auto.
Replace the parameter connections to an instantiation with ones
automatically derived from the module header of the instantiated netlist.

See M-x verilog-auto-inst for limitations, and templates to customize the
output.

For example, first take the submodule InstModule.v:

module InstModule (o,i);
parameter PAR;
endmodule

This is then used in an upper level module:

module ExampInst (o,i);
parameter PAR;
InstModule #(/*AUTOINSTPARAM*/)
instName (/*AUTOINST*/);
endmodule

Typing M-x verilog-auto will make this into:

module ExampInst (o,i);
output o;
input i;
InstModule #(/*AUTOINSTPARAM*/
// Parameters
.PAR (PAR));
instName (/*AUTOINST*/);
endmodule

Where the list of parameter connections come from the inst module.

Templates:

You can customize the parameter connections using AUTO_TEMPLATEs,
just as you would with M-x verilog-auto-inst.